1. Field of the Invention
The present invention generally relates to automated pattern metrology site placement and optimization for accurate characterization of pattern morphology that includes but is not limited to localized critical dimension (CD) change, line or space width change and curvature. Certain embodiments relate to methods and systems for determining one or more parameters of a metrology process to be performed on a specimen.
2. Description of the Related Art
The following description and examples are not admitted be prior art by virtue of their inclusion in this section.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to drive higher yield in the manufacturing process and thus higher profits. Inspection has always been an important part of fabricating semiconductor devices. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail.
Defect review typically involves re-detecting defects detected as such by an inspection process and generating additional information about the defects at a higher resolution using either a high magnification optical system or a scanning electron microscope (SEM). Defect review is therefore performed at discrete locations on the wafer where defects have been detected by inspection. The higher resolution data for the defects generated by defect review is more suitable for determining attributes of the defects such as profile, roughness, more accurate size information, etc. Since the defect review is performed for defects detected on the wafer by inspection, the parameters used for defect review at a location of a detected defect may be determined based on attributes of the defects determined by the inspection process. However, the output acquisition parameters (e.g., optical, electron beam, etc. parameters) used for defect review at a location of a detected defect are generally not determined based on information about the portion of the design in or near the location of the defect because such information is generally irrelevant to the output acquisition functions performed for the detected defects during defect review.
Metrology processes are also used at various steps during a semiconductor manufacturing process to monitor and control the process. Metrology processes are different than inspection processes in that, unlike inspection processes in which defects are detected on a wafer, metrology processes are used to measure one or more characteristics of the wafer that cannot be determined using currently used inspection tools. For example, metrology processes are used to measure one or more characteristics of a wafer such as a dimension (e.g., line width, thickness, etc.) of features formed on the wafer during a process such that the performance of the process can be determined from the one or more characteristics. In addition, if the one or more characteristics of the wafer are unacceptable (e.g., out of a predetermined range for the characteristic(s)), the measurements of the one or more characteristics of the wafer may be used to alter one or more parameters of the process such that additional wafers manufactured by the process have acceptable characteristic(s).
Metrology processes are also different than defect review processes in that, unlike defect review processes in which defects that are detected by inspection are re-visited in defect review, metrology processes may be performed at locations at which no defect has been detected. In other words, unlike defect review, the locations at which a metrology process is performed on a wafer may be independent of the results of an inspection process performed on the water. In particular, the locations at which a metrology process is performed may be selected independently of inspection results. In addition, since locations on the wafer at Which metrology is performed may be selected independently of inspection results, unlike defect review in which the locations on the wafer at which defect review is to be performed cannot be determined until the inspection results for the wafer are generated and available for use, the locations at which the metrology process is performed may be determined before an inspection process has been performed on the wafer.
Current methods used for setting up metrology processes have a number of disadvantages. For example, conventional recipe setup for pattern metrology (including, for example, critical dimension (CD) and overlay measurements) with a SEM requires prior knowledge of the locations that are to be measured. In addition, the conventional recipe setup process often includes the use of the design. Furthermore, if a new pattern of interest (POI) is discovered that the user wants to measure once or on an ongoing basis, it requires an update of the metrology tool recipe.
Accordingly, it would be advantageous to develop systems and methods for determining one or more parameters of a metrology process to be performed on a specimen that do not have one or more of the disadvantages described above.